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abstrac1.docx | Subroutine | Microcontroller

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    Interrupts in 8051 Abstract   An interrupt causes a temporary diversionof program execution in a similar sense toa program subroutine call, but an interruptis triggered by some event, external to thecurrently operating program. We say theinterrupt event occurs asynchronously tothe currently operating program as it is notnecessary to know in advance when theinterrupt event is going to occur. Keyword :software and hardwareinterrupt,IE,IP register  Introduction: 8051 INTERRUPTS There are five interrupt sources for the8051. Since the main RESET input canalso beconsidered as an interrupt, sixinterrupts can be listed as follows:Interrupt Flag Vector addressSystem RESET RST 0000hExternal interrupt 0 IE0 0003hTimer/counter 0 TF0 000BhExternal interrupt 1 IE1 0013hTimer/counter 1 TF1 001BhSerial interrupt RI orTI 0023hWe will concentrate on the externalinterrupts for now, and later we will examine theother interrupt sources. Here’s a brief look at some of the register bitswhich will be used to set up the interruptsin the example programs.The Interrupt Enable, IE, register is anSFR register at location A8h in InternalRAM.The EA bit will enable all interrupts (whenset to 1) and the individual interrupts mustalso be enabled. For example, if we wantto enable the two external interrupts wewould use the instruction:MOV IE, #10000101BEach of the two external interrupt sourcescan be defined to trigger on the externalsignal, either on a negative going edge or on a logic low level state. The negativeedge trigger is usually preferred as theinterrupt flag is automatically cleared byhardware,in this mode. Two bits in theTCON register are used to define thetrigger operation. The TCON register isanother SFR register and is located atlocation 88h in Internal RAM. The other  bits in the TCON register will be describedlater in the context of the hardwareTimer/Counters. To define negative edgetriggering for the two external interruptsuse instructions as follows: SETB IT0 ;negative edge trigger for interrupt 0 SETBIT1 ; negative edge trigger for interrupt 1shows the flow of operation when asystem is interrupted. In the example itis assumed that some program, say themain program, is executing when theexternal interrupt INT0 occurs. The 8051hardware will automatically complete thecurrent machine level (assembler level)instruction and save the Program Counter to the stack. The IE register is also savedto the stack. The IE0 flag is disabled(cleared) so that another INT0 interruptwill be inhibited while the current interruptis being serviced. The Program Counter isnow loaded with the vector location0003h. This vector address is a predefinedaddress for interrupt INT0 so that programexecution will always trap to this addresswhen an INT0 interrupt occurs. Other interrupt sources have uniquely definedvector addresses for this purpose. The setof these vector addresses is referred to asthe interrupt vector table.Program execution is now transferred toaddress location 0003h. In the example aLJMP instruction is programmed at thisaddress to cause the program to jump to a predefined start address location for therelevant ISR (Interrupt Service Routine)routine. The ISR routine is a user writtenroutine, which defines what action is tooccur following the interrupt event. It isgood practice to save (PUSH) to the stack   any registers used during the ISR routineand to restore (POP) these registers at theend of the ISR routine, thus preserving the registers’ contents, just like a register is   preserved within a subroutine program.The last instruction in the ISR routine is aRETI (RETurn from Interrupt) instructionand this instruction causes the 8051 torestore the IE register values, enable theINT0 flag, and restore the ProgramCounter contents from the stack.Since the Program Counter now containsthe address of the next instruction whichwas to be executed before the INT0interrupt occurred, the main programcontinues as if it had never beinginterrupted. Thus only the temporal behavior of the interrupted program has been affected by the interrupt; the logic of the program has not been otherwiseaffected. EXAMPLE INTERRUPT DRIVENPROGRAM manufacturing process, is to be controlledwithin the temperature range, between190 o C and 200 o C . An 8051microcomputer based system is used tocontrol the temperature. The oven has two built-in temperature sensors. The lowthreshold sensor outputs a logic 0 if thetemperature is below 190 o C, otherwise itoutputs a logic high-level (say 5 volts).The high threshold sensor outputs a logiclow level if the temperature exceeds 200 o C, otherwise it outputs a logic high level.The temperature sensors are connected to the 8051’s interrupt inputs, INT0 and INT1, as shown in the diagram. Both of these interrupt inputs are set to trigger atnegative voltage transitions. Themicrocomputer outputs a logic 1 on theP1.0 output pin to turn on the heater element and it outputs a logic 0 to turn off the heating element. Assume the necessaryhardware driver circuitry, to switch power to the oven, is included in the oven. Theassembler language source program tocontrol the oven is shown in listing.Since the ISR routines (Interrupt ServiceRoutines) are very short they could have been positioned within the 8 bytes of memory available at the respective vector locations. However, the ISR routines arelocated higher up in memory to show thememory positioning structure which would be used for larger ISR routines. Threevector locations are defined at the beginning of the program. The RESETvector, at address 0000h, contains a jumpinstruction to the MAIN program.Location 0003h is the vector location for external interrupt 0, and this contains a jump instruction to the relevant ISR routine, ISR0. External interrupt 1uses thevector location 0013h which contains a jump instruction to the ISR routine, ISR1.In this oven control program example themain program just loops around doingnothing. When an interrupt occurs,therequired action is carried out by therelevant ISR routine. However, in a moresophisticated program the main programcould be doing something very useful andwould be interrupted only when the oventemperature needs to be adjusted, on or off.Thus the main program does not haveto waste time polling the sensor inputs. OTHER SOURCES OF INTERRUPTS  If we follow the external interrupt   INT0, for example, we see that thisexternal interrupt connects to the processor at the. Note Port 3 can be used as astandard input/output port as shown earlier   –   but various Port 3 pins have alternativefunctionality. When INT0 is activated(negative edge usually), internally withinthe 8051 the EX0 request is raised. Thisflags an interrupt request but the relevantinterrupt bit within the IE register must beset, along with the EA bit if this interruptrequest is to raise an interrupt flag. Theinterrupt flag IE0 is then raised and causesthe program counter (PC) to vector tovector location 0003h, as discussed earlier. Note, the Timer/Counter interrupt flagscan be software polled even if the ETx bitsare not enabled. Interrupts can also besoftware generated by setting the interruptflags in software. The interrupt flags areaccessible as flags on the TCON andSCON registers as follows conclusion: hence we studied theinterrupt of 8051 microcontroller  Reference: 1)analytical controller by a.n.sharma2)principle of controller y.k.zing3)microcontroller and application by M AChintamani
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